U11 Truth Tables
U11 is a PAL16R6 which has two purely combinatorial outputs and 6 registered outputs
which latch new values when the CLK signal is pulsed.
Output IO1 (combinatorial)
| I5 |
I6 |
I7 |
|
IO1 |
| 0 |
0 |
0 |
|
0 |
| 0 |
0 |
1 |
|
0 |
| 0 |
1 |
0 |
|
0 |
| 0 |
1 |
1 |
|
0 |
| 1 |
0 |
0 |
|
1 |
| 1 |
0 |
1 |
|
1 |
| 1 |
1 |
0 |
|
1 |
| 1 |
1 |
1 |
|
0 |
Output O2 (registered)
| O2 |
O3 |
O4 |
I2 |
|
O2 |
| 0 |
0 |
0 |
0 |
|
1 |
| 0 |
0 |
0 |
1 |
|
0 |
| 0 |
0 |
1 |
0 |
|
1 |
| 0 |
0 |
1 |
1 |
|
0 |
| 0 |
1 |
0 |
0 |
|
1 |
| 0 |
1 |
0 |
1 |
|
0 |
| 0 |
1 |
1 |
0 |
|
1 |
| 0 |
1 |
1 |
1 |
|
0 |
| 1 |
0 |
0 |
0 |
|
0 |
| 1 |
0 |
0 |
1 |
|
0 |
| 1 |
0 |
1 |
0 |
|
0 |
| 1 |
0 |
1 |
1 |
|
0 |
| 1 |
1 |
0 |
0 |
|
0 |
| 1 |
1 |
0 |
1 |
|
0 |
| 1 |
1 |
1 |
0 |
|
1 |
| 1 |
1 |
1 |
1 |
|
0 |
Output O3 (registered)
| O2 |
O3 |
O4 |
I2 |
|
O3 |
| 0 |
0 |
0 |
0 |
|
0 |
| 0 |
0 |
0 |
1 |
|
0 |
| 0 |
0 |
1 |
0 |
|
0 |
| 0 |
0 |
1 |
1 |
|
0 |
| 0 |
1 |
0 |
0 |
|
1 |
| 0 |
1 |
0 |
1 |
|
0 |
| 0 |
1 |
1 |
0 |
|
1 |
| 0 |
1 |
1 |
1 |
|
0 |
| 1 |
0 |
0 |
0 |
|
1 |
| 1 |
0 |
0 |
1 |
|
0 |
| 1 |
0 |
1 |
0 |
|
1 |
| 1 |
0 |
1 |
1 |
|
0 |
| 1 |
1 |
0 |
0 |
|
0 |
| 1 |
1 |
0 |
1 |
|
0 |
| 1 |
1 |
1 |
0 |
|
1 |
| 1 |
1 |
1 |
1 |
|
0 |
Output O4 (registered)
| O2 |
O3 |
O4 |
I2 |
|
O4 |
| 0 |
0 |
0 |
0 |
|
0 |
| 0 |
0 |
0 |
1 |
|
0 |
| 0 |
0 |
1 |
0 |
|
1 |
| 0 |
0 |
1 |
1 |
|
0 |
| 0 |
1 |
0 |
0 |
|
0 |
| 0 |
1 |
0 |
1 |
|
0 |
| 0 |
1 |
1 |
0 |
|
1 |
| 0 |
1 |
1 |
1 |
|
0 |
| 1 |
0 |
0 |
0 |
|
0 |
| 1 |
0 |
0 |
1 |
|
0 |
| 1 |
0 |
1 |
0 |
|
1 |
| 1 |
0 |
1 |
1 |
|
0 |
| 1 |
1 |
0 |
0 |
|
1 |
| 1 |
1 |
0 |
1 |
|
0 |
| 1 |
1 |
1 |
0 |
|
1 |
| 1 |
1 |
1 |
1 |
|
0 |
Output O5 (registered)
| O2 |
O3 |
O4 |
I2 |
|
O5 |
| 0 |
0 |
0 |
0 |
|
1 |
| 0 |
0 |
0 |
1 |
|
1 |
| 0 |
0 |
1 |
0 |
|
0 |
| 0 |
0 |
1 |
1 |
|
1 |
| 0 |
1 |
0 |
0 |
|
1 |
| 0 |
1 |
0 |
1 |
|
1 |
| 0 |
1 |
1 |
0 |
|
1 |
| 0 |
1 |
1 |
1 |
|
1 |
| 1 |
0 |
0 |
0 |
|
1 |
| 1 |
0 |
0 |
1 |
|
1 |
| 1 |
0 |
1 |
0 |
|
0 |
| 1 |
0 |
1 |
1 |
|
1 |
| 1 |
1 |
0 |
0 |
|
0 |
| 1 |
1 |
0 |
1 |
|
1 |
| 1 |
1 |
1 |
0 |
|
1 |
| 1 |
1 |
1 |
1 |
|
1 |
Output O6 (registered)
| O2 |
O3 |
O4 |
I2 |
|
O6 |
| 0 |
0 |
0 |
0 |
|
1 |
| 0 |
0 |
0 |
1 |
|
1 |
| 0 |
0 |
1 |
0 |
|
1 |
| 0 |
0 |
1 |
1 |
|
1 |
| 0 |
1 |
0 |
0 |
|
1 |
| 0 |
1 |
0 |
1 |
|
1 |
| 0 |
1 |
1 |
0 |
|
0 |
| 0 |
1 |
1 |
1 |
|
1 |
| 1 |
0 |
0 |
0 |
|
1 |
| 1 |
0 |
0 |
1 |
|
1 |
| 1 |
0 |
1 |
0 |
|
0 |
| 1 |
0 |
1 |
1 |
|
1 |
| 1 |
1 |
0 |
0 |
|
1 |
| 1 |
1 |
0 |
1 |
|
1 |
| 1 |
1 |
1 |
0 |
|
0 |
| 1 |
1 |
1 |
1 |
|
1 |
Output O7 (registered)
| I3 |
I4 |
|
O7 |
| 0 |
0 |
|
0 |
| 0 |
1 |
|
1 |
| 1 |
0 |
|
1 |
| 1 |
1 |
|
0 |
Output IO8 (combinatorial)
| O2 |
O3 |
O4 |
I1 |
|
IO8 |
| 0 |
0 |
0 |
0 |
|
1 |
| 0 |
0 |
0 |
1 |
|
0 |
| 0 |
0 |
1 |
0 |
|
0 |
| 0 |
0 |
1 |
1 |
|
0 |
| 0 |
1 |
0 |
0 |
|
1 |
| 0 |
1 |
0 |
1 |
|
0 |
| 0 |
1 |
1 |
0 |
|
0 |
| 0 |
1 |
1 |
1 |
|
0 |
| 1 |
0 |
0 |
0 |
|
1 |
| 1 |
0 |
0 |
1 |
|
0 |
| 1 |
0 |
1 |
0 |
|
0 |
| 1 |
0 |
1 |
1 |
|
0 |
| 1 |
1 |
0 |
0 |
|
1 |
| 1 |
1 |
0 |
1 |
|
0 |
| 1 |
1 |
1 |
0 |
|
1 |
| 1 |
1 |
1 |
1 |
|
1 |